ICC model GTECH is not defined
时间:03-15
整理:3721RD
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I create a verilog code by DC for (half adder circuit ), but I have a new problem when I import design, that what I do in (attachment).
![](http://bbs.eetop.cn/attachments/swfupload/131206093824ee894ac008c9ed.png)
![](http://bbs.eetop.cn/attachments/swfupload/13120609381b9760a09bcb6069.png)
![](http://bbs.eetop.cn/attachments/swfupload/131206093824ee894ac008c9ed.png)
![](http://bbs.eetop.cn/attachments/swfupload/13120609381b9760a09bcb6069.png)
![](http://bbs.eetop.cn/attachments/swfupload/13120609382eab4a64b99d1826.png)
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要用真正的库。
how can I use it ? can you describe in details.