关于 可编程器件 扩展I/O口的疑问
时间:10-02
整理:3721RD
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比如用GAL16V8D 改写38译码器代码 来实现I/O 口的问题:
CASE ENTER IS
WHEN "000" => X<= "ZZZZZZZ1";
WHEN "001" => X<= "ZZZZZZ1Z";
WHEN "010" => X<= "ZZZZZ1ZZ";
WHEN "011" => X<= "ZZZZ1ZZZ";
WHEN "100" => X<= "ZZZ1ZZZZ";
WHEN "101" => X<= "ZZ1ZZZZZ";
WHEN "110" => X<= "Z1ZZZZZZ";
WHEN "111" => X<= "1ZZZZZZZ";
WHEN OTHERS=> X<="ZZZZZZZZ"
END CASE;
这样能实现某一时刻只有一个输出为高电平而其他引脚均无输出吗?
但为何其他引脚仍能检测到电平?是程序有问题吗?
CASE ENTER IS
WHEN "000" => X<= "ZZZZZZZ1";
WHEN "001" => X<= "ZZZZZZ1Z";
WHEN "010" => X<= "ZZZZZ1ZZ";
WHEN "011" => X<= "ZZZZ1ZZZ";
WHEN "100" => X<= "ZZZ1ZZZZ";
WHEN "101" => X<= "ZZ1ZZZZZ";
WHEN "110" => X<= "Z1ZZZZZZ";
WHEN "111" => X<= "1ZZZZZZZ";
WHEN OTHERS=> X<="ZZZZZZZZ"
END CASE;
这样能实现某一时刻只有一个输出为高电平而其他引脚均无输出吗?
但为何其他引脚仍能检测到电平?是程序有问题吗?