内层走线,DRC短路提示的问题
4层板使用内层(负片,棕色)走线,DRC检测提示短路(图中ADJ和CTRL),不知道为何?高手指点,多谢!

Processing Rule : Short-Circuit Constraint (Allowed=Not Allowed) (On the board ),(On the board )
Violation between Via (395.605mm,217.297mm) TopLayer to BottomLayer and
Polygon Track (395.732mm,218.059mm)(396.494mm,217.297mm) InternalPlane1
Violation between Via (394.335mm,216.027mm) TopLayer to BottomLayer and
Polygon Track (394.589mm,215.392mm)(396.494mm,217.297mm) InternalPlane1
Violation between Via (395.605mm,217.297mm) TopLayer to BottomLayer and
Polygon Track (394.589mm,215.392mm)(396.494mm,217.297mm) InternalPlane1
Violation between Via (394.335mm,216.027mm) TopLayer to BottomLayer and
