望各位大神帮忙纠正一下错误。谢谢!
时间:10-02
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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity lcd1602 is
port
(
clk :in std_logic;
rst :in std_logic;
key_in :in std_logic_vector(7 downto 0);--按键输入
key_sw :in std_logic_vector(1 downto 0);--时钟模式,00:正常模式,01:闹钟模式,10:定时模式,11:调整模式
ctrl_p :out std_logic_vector(1 downto 0);--模式传输
flag_p :out std_logic_vector(2 downto 0);--调整数据完成后依次传输标志
data_out :in std_logic_vector(7 downto 0);--调整完毕后数据输出端口
flag_1 :out std_logic_vector(2 downto 0);
rec_data:in std_logic_vector(7 downto 0);
LCD_D : out std_logic_vector(7 downto 0);
LCD_E : out std_logic;
LCD_RS : out std_logic;
LCD_RW : out std_logic
);
end ;
architecture fun of lcd1602 is
signal reset : std_logic;
signal clk_e : std_logic:='0';
signal cnt_e : integer range 0 to 500000 ;
signal cnt_delay : integer range 0 to 9 ;
signal minute,second,hour,day,week,month,year :std_logic_vector(7 downto 0);
signal second_s,second_g,minute_s,minute_g,hour_s,hour_g,day_s,day_g,w,month_s,month_g,year_s,year_g :std_logic_vector(7 downto 0);
signal lcd_status : integer range 0 to 6 ;
signal count : integer range 0 to 20 :=0;
constant lcd_idle : integer:=0; --开机等待
constant lcd_clear: integer:=1; --清屏
constant lcd_set : integer:=2; --功能设置
constant lcd_swit : integer:=3; --显示开关设置
constant lcd_mod : integer:=4; --输入方式设置
constant lcd_init : integer:=5; --初始化完成等待1.64ms
constant lcd_wrreg: integer:=6; --写寄存器
---=====初始化====----
--清屏
constant clear : std_logic_vector(7 downto 0):="00000001";
--功能设置
constant f_set : std_logic_vector(2 downto 0):="001" ;
constant DL : std_logic:='1' ; --接口数据位设置
constant N : std_logic:='1' ; --行数设置
constant F : std_logic_vector:="0" ; --字形设置
--显示开关控制
constant swit : std_logic_vector(4 downto 0):="00001";
constant D : std_logic:='1'; --调整显示开关
constant C : std_logic:='0'; --光标开关
constant B : std_logic:='0'; --字符闪烁开关
--输入方式设置
constant modset : std_logic_vector(5 downto 0):="000001";
constant ID : std_logic:='1'; --光标移动方式
constant S : std_logic:='0'; --整体显示位移
---===写寄存器===---
signal com_data : std_logic_vector(7 downto 0):=(others=>'0') ;--指令
signal data : std_logic_vector(7 downto 0):=(others=>'0') ;--数据
signal wr_reg : std_logic_vector(1 downto 0) :=(others=>'0'); --写寄存器标志 01: 写指令 10:写数据
----==========-----
signal sig_en : std_logic:='0' ; --写数据计数器使能
signal sys_cnt : integer range 0 to 22 ; -- 写数据计数器
signal sig_end,sig_end_d : std_logic:='0' ; --写数据结束标志
---====按键信号====----
constant normal_mode : std_logic_vector(1 downto 0):="00";
constant alarm_mode : std_logic_vector(1 downto 0):="01";
constant timer_mode : std_logic_vector(1 downto 0):="10";
constant adjust_mode : std_logic_vector(1 downto 0):="11";
signal current_status: std_logic_vector(1 downto 0);
signal key_d,key_out : std_logic_vector(7 downto 0);
signal key : std_logic_vector(7 downto 0):="11111111";
signal clock : std_logic;
signal cnt : integer range 0 to 1999999;
signal ctrl_p : std_logic_vector(1 downto 0);
signal timer,timer_s,timer_g,timer_p :std_logic_vector(7 downto 0);
signal count1 : integer range 0 to 5;
signal sys_cnt1 :integer range 0 to 5;
begin
reset cnt_delay lcd_status lcd_status lcd_status lcd_status if wr_reg="01" or wr_reg="10" then --初始化完成等待1.64ms
lcd_status if wr_reg="00" then --写数据
lcd_status lcd_status '0');
elsif falling_edge(clk_e) then
if lcd_status=lcd_clear then
LCD_RS '0');
end if ;
end if ;
end process;
--- 输入显示内容
process(lcd_status,sig_end)
begin
if lcd_status=lcd_wrreg then
sig_en flag_1 flag_1 flag_1 flag_1 flag_1 flag_1 flag_1 null;
end case;
else
count1 timer_s timer_g null;
end case;
if count1 =5 then
count1 data data data data data data data data data data data data data com_data data data data data data data data data com_data wr_reg data data com_data wr_reg current_status current_status current_status current_status current_status ctrl_p ctrl_p ctrl_p ctrl_p current_status<=null;
end case;
end if;
end process; --Error (10500): VHDL syntax error at lcd1602.vhd(458) near text "process"; expecting "if"
process(clock)
begin --Error (10500): VHDL syntax error at lcd1602.vhd(460) near text "begin"; expecting ":=", or "<="
if rising_edge(clock) then
if current_status =alarm_mode or adjust_mode then
if key_out="11111110" then
if minute(6 downto 0)/= "1011001" then
if minute(3 downto 0)<"1001" then
minute<=minute+1;
else
minute<=minute+x"10";
minute<=minute(7 downto 4)&"0000";
end if;
else
minute<=x"00";
end if;
elsif key_out="11111101" then
if hour(5 downto 0)/= "100011" then
if hour(3 downto 0)<"1001" then
hour<=hour+1;
else
hour<=hour+x"10";
hour<=hour(7 downto 4)&"0000";
end if;
else
hours<=x"00";
end if;
elsif key_out="11111011" then
if day(5 downto 0)/="110001" then
if day(3 downto 0)<"1001" then
day<=day+1;
else
day<=day+x"10";
day<=day(7 downto 4)&"0000";
end if;
else
day<=x"00";
end if;
elsif key_out="11110111" then
if week(2 downto 0)/="000" then
week<=week+1;
else
week<=week(7 downto 3)&"000";
end if;
elsif key_out="11101111" then
if month(4 downto 0)/="10010" then
if month(3 downto 0)<"1001" then
month<=month+1;
else
month<=month+x"10";
month<=month(7 downto 4)&"0000";
end if;
else
month<=x"00";
end if;
elsif key_out="11011111" then
if year<x"99" then
if year(3 downto 0)<"1001" then
year<=year+1;
else
year<=year+x"10";
year<=year(7 downto 4)&"0000";
end if;
else
year<=x"00";
end if;
elsif key_out="01111111" then
flag_p<="001";data_out<=minute;
flag_p<="010";data_out<=hour;
flag_p<="011";data_out<=day;
flag_p<="100";data_out<=week;
flag_p<="101";data_out<=day;
flag_p<="110";data_out<=month;
flag_p<="111";data_out<=year;
flag_p<="000";
end if;
elsif current_status =timer_mode then
if key_out="11111110" then
if timer<x"99" then
if timer(3 downto 0)<"1001" then
timer<=timer+1;
else
timer<=timer+x"10";
timer<=timer(7 downto 4)&"0000";
end if;
else
timer<=x"00";
end if;
elsif key_out="11111101" then
if timer(7 downto 4)<"1001" then
timer<=timer+x"10";
else
timer<="0000"&timer(3 downto 0);
end if;
elsif key_out="01111111" then
flag_p<="001";
timer_p<=(timer_s-"00110000")*"1010"+(timer_g-"00110000");
data_out<=timer_p;
flag_p<="000";
end if;
end if;
end if;
end process; --Error (10500): VHDL syntax error at lcd1602.vhd(561) near text "process"; expecting "if"
end fun;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity lcd1602 is
port
(
clk :in std_logic;
rst :in std_logic;
key_in :in std_logic_vector(7 downto 0);--按键输入
key_sw :in std_logic_vector(1 downto 0);--时钟模式,00:正常模式,01:闹钟模式,10:定时模式,11:调整模式
ctrl_p :out std_logic_vector(1 downto 0);--模式传输
flag_p :out std_logic_vector(2 downto 0);--调整数据完成后依次传输标志
data_out :in std_logic_vector(7 downto 0);--调整完毕后数据输出端口
flag_1 :out std_logic_vector(2 downto 0);
rec_data:in std_logic_vector(7 downto 0);
LCD_D : out std_logic_vector(7 downto 0);
LCD_E : out std_logic;
LCD_RS : out std_logic;
LCD_RW : out std_logic
);
end ;
architecture fun of lcd1602 is
signal reset : std_logic;
signal clk_e : std_logic:='0';
signal cnt_e : integer range 0 to 500000 ;
signal cnt_delay : integer range 0 to 9 ;
signal minute,second,hour,day,week,month,year :std_logic_vector(7 downto 0);
signal second_s,second_g,minute_s,minute_g,hour_s,hour_g,day_s,day_g,w,month_s,month_g,year_s,year_g :std_logic_vector(7 downto 0);
signal lcd_status : integer range 0 to 6 ;
signal count : integer range 0 to 20 :=0;
constant lcd_idle : integer:=0; --开机等待
constant lcd_clear: integer:=1; --清屏
constant lcd_set : integer:=2; --功能设置
constant lcd_swit : integer:=3; --显示开关设置
constant lcd_mod : integer:=4; --输入方式设置
constant lcd_init : integer:=5; --初始化完成等待1.64ms
constant lcd_wrreg: integer:=6; --写寄存器
---=====初始化====----
--清屏
constant clear : std_logic_vector(7 downto 0):="00000001";
--功能设置
constant f_set : std_logic_vector(2 downto 0):="001" ;
constant DL : std_logic:='1' ; --接口数据位设置
constant N : std_logic:='1' ; --行数设置
constant F : std_logic_vector:="0" ; --字形设置
--显示开关控制
constant swit : std_logic_vector(4 downto 0):="00001";
constant D : std_logic:='1'; --调整显示开关
constant C : std_logic:='0'; --光标开关
constant B : std_logic:='0'; --字符闪烁开关
--输入方式设置
constant modset : std_logic_vector(5 downto 0):="000001";
constant ID : std_logic:='1'; --光标移动方式
constant S : std_logic:='0'; --整体显示位移
---===写寄存器===---
signal com_data : std_logic_vector(7 downto 0):=(others=>'0') ;--指令
signal data : std_logic_vector(7 downto 0):=(others=>'0') ;--数据
signal wr_reg : std_logic_vector(1 downto 0) :=(others=>'0'); --写寄存器标志 01: 写指令 10:写数据
----==========-----
signal sig_en : std_logic:='0' ; --写数据计数器使能
signal sys_cnt : integer range 0 to 22 ; -- 写数据计数器
signal sig_end,sig_end_d : std_logic:='0' ; --写数据结束标志
---====按键信号====----
constant normal_mode : std_logic_vector(1 downto 0):="00";
constant alarm_mode : std_logic_vector(1 downto 0):="01";
constant timer_mode : std_logic_vector(1 downto 0):="10";
constant adjust_mode : std_logic_vector(1 downto 0):="11";
signal current_status: std_logic_vector(1 downto 0);
signal key_d,key_out : std_logic_vector(7 downto 0);
signal key : std_logic_vector(7 downto 0):="11111111";
signal clock : std_logic;
signal cnt : integer range 0 to 1999999;
signal ctrl_p : std_logic_vector(1 downto 0);
signal timer,timer_s,timer_g,timer_p :std_logic_vector(7 downto 0);
signal count1 : integer range 0 to 5;
signal sys_cnt1 :integer range 0 to 5;
begin
reset cnt_delay lcd_status lcd_status lcd_status lcd_status if wr_reg="01" or wr_reg="10" then --初始化完成等待1.64ms
lcd_status if wr_reg="00" then --写数据
lcd_status lcd_status '0');
elsif falling_edge(clk_e) then
if lcd_status=lcd_clear then
LCD_RS '0');
end if ;
end if ;
end process;
--- 输入显示内容
process(lcd_status,sig_end)
begin
if lcd_status=lcd_wrreg then
sig_en flag_1 flag_1 flag_1 flag_1 flag_1 flag_1 flag_1 null;
end case;
else
count1 timer_s timer_g null;
end case;
if count1 =5 then
count1 data data data data data data data data data data data data data com_data data data data data data data data data com_data wr_reg data data com_data wr_reg current_status current_status current_status current_status current_status ctrl_p ctrl_p ctrl_p ctrl_p current_status<=null;
end case;
end if;
end process; --Error (10500): VHDL syntax error at lcd1602.vhd(458) near text "process"; expecting "if"
process(clock)
begin --Error (10500): VHDL syntax error at lcd1602.vhd(460) near text "begin"; expecting ":=", or "<="
if rising_edge(clock) then
if current_status =alarm_mode or adjust_mode then
if key_out="11111110" then
if minute(6 downto 0)/= "1011001" then
if minute(3 downto 0)<"1001" then
minute<=minute+1;
else
minute<=minute+x"10";
minute<=minute(7 downto 4)&"0000";
end if;
else
minute<=x"00";
end if;
elsif key_out="11111101" then
if hour(5 downto 0)/= "100011" then
if hour(3 downto 0)<"1001" then
hour<=hour+1;
else
hour<=hour+x"10";
hour<=hour(7 downto 4)&"0000";
end if;
else
hours<=x"00";
end if;
elsif key_out="11111011" then
if day(5 downto 0)/="110001" then
if day(3 downto 0)<"1001" then
day<=day+1;
else
day<=day+x"10";
day<=day(7 downto 4)&"0000";
end if;
else
day<=x"00";
end if;
elsif key_out="11110111" then
if week(2 downto 0)/="000" then
week<=week+1;
else
week<=week(7 downto 3)&"000";
end if;
elsif key_out="11101111" then
if month(4 downto 0)/="10010" then
if month(3 downto 0)<"1001" then
month<=month+1;
else
month<=month+x"10";
month<=month(7 downto 4)&"0000";
end if;
else
month<=x"00";
end if;
elsif key_out="11011111" then
if year<x"99" then
if year(3 downto 0)<"1001" then
year<=year+1;
else
year<=year+x"10";
year<=year(7 downto 4)&"0000";
end if;
else
year<=x"00";
end if;
elsif key_out="01111111" then
flag_p<="001";data_out<=minute;
flag_p<="010";data_out<=hour;
flag_p<="011";data_out<=day;
flag_p<="100";data_out<=week;
flag_p<="101";data_out<=day;
flag_p<="110";data_out<=month;
flag_p<="111";data_out<=year;
flag_p<="000";
end if;
elsif current_status =timer_mode then
if key_out="11111110" then
if timer<x"99" then
if timer(3 downto 0)<"1001" then
timer<=timer+1;
else
timer<=timer+x"10";
timer<=timer(7 downto 4)&"0000";
end if;
else
timer<=x"00";
end if;
elsif key_out="11111101" then
if timer(7 downto 4)<"1001" then
timer<=timer+x"10";
else
timer<="0000"&timer(3 downto 0);
end if;
elsif key_out="01111111" then
flag_p<="001";
timer_p<=(timer_s-"00110000")*"1010"+(timer_g-"00110000");
data_out<=timer_p;
flag_p<="000";
end if;
end if;
end if;
end process; --Error (10500): VHDL syntax error at lcd1602.vhd(561) near text "process"; expecting "if"
end fun;