哪位大侠帮忙看看下面代码
时间:10-02
整理:3721RD
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module run(clk,rst,led_out);
input clk;
input rst;
output [2:0] led_out;
reg [15:0] count2;
parameter T1MS=16'd49_999;
always@(posedge clk or negedge rst)
if(!rst)
count2<=16'd0;
else if(count2==T1MS)
count2<=16'd0;
else
count2<=count2+1'b1;
reg [9:0] count_MS;
always@(posedge clk or negedge rst)
if(!rst)
count_MS<=10'd0;
else if(count_MS==10'd100)
count_MS<=10'd0;
else
count_MS<=count_MS+1'b1;
reg [2:0] r_led_out;
always@(posedge clk or negedge rst)
if(!rst)
r_led_out<=3'b001;
else if(count_MS==10'd100)
begin
if(r_led_out==3'b000)
r_led_out<=3'b001;
else
r_led_out<={r_led_out[1:0],1'b0};
end
assign led_out=r_led_out;
endmodule一个简单的流水灯代码,可下载到板子上总是灯全亮,看了N遍也没有看错错在哪,请哪位大侠帮忙看看,谢谢哈
input clk;
input rst;
output [2:0] led_out;
reg [15:0] count2;
parameter T1MS=16'd49_999;
always@(posedge clk or negedge rst)
if(!rst)
count2<=16'd0;
else if(count2==T1MS)
count2<=16'd0;
else
count2<=count2+1'b1;
reg [9:0] count_MS;
always@(posedge clk or negedge rst)
if(!rst)
count_MS<=10'd0;
else if(count_MS==10'd100)
count_MS<=10'd0;
else
count_MS<=count_MS+1'b1;
reg [2:0] r_led_out;
always@(posedge clk or negedge rst)
if(!rst)
r_led_out<=3'b001;
else if(count_MS==10'd100)
begin
if(r_led_out==3'b000)
r_led_out<=3'b001;
else
r_led_out<={r_led_out[1:0],1'b0};
end
assign led_out=r_led_out;
endmodule一个简单的流水灯代码,可下载到板子上总是灯全亮,看了N遍也没有看错错在哪,请哪位大侠帮忙看看,谢谢哈
虽然没人来帮忙,但是我最后找到问题了,嘿嘿