请大神帮忙看看这个VHDL程序~
时间:10-02
整理:3721RD
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刚学VHDL不久,尝试着写了个16位乘法器程序,思路就是把序列A 与B的每一位相乘并移位相加,但是程序通不过。求助啊。
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;
-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity multiplier1 is
port(A:in STD_LOGIC_VECTOR(15 downto 0);
B:in STD_LOGIC_VECTOR(15 downto 0);
rst:in std_logic;
clk:in std_logic;
Q:out STD_LOGIC_VECTOR(31 downto 0));
end multiplier1;
architecture Behavioral of multiplier1 is
signal QT:std_logic_vector(31 downto 0);
signal TEMP:std_logic_vector(31 downto 0);
signal n:integer:=0;
begin
process(clk)
begin
if rst='0' then Q
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP '0');
end case;
QT<=QT+TEMP;
n<=n+1;
end if;
else Q<=QT;
end if;
end if;
end process;
end Behavioral;
但是有两个error
ERROR:HDLParsers:808 - "D:/my project/multi/multiplier1.vhd" Line 52. = can not have such operands in this context.
ERROR:HDLParsers:164 - "D:/my project/multi/multiplier1.vhd" Line 87. parse error, unexpected IDENTIFIER, expecting PIPE or ROW
怎么弄啊?大神有什么好的建议也可以说说~
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;
-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity multiplier1 is
port(A:in STD_LOGIC_VECTOR(15 downto 0);
B:in STD_LOGIC_VECTOR(15 downto 0);
rst:in std_logic;
clk:in std_logic;
Q:out STD_LOGIC_VECTOR(31 downto 0));
end multiplier1;
architecture Behavioral of multiplier1 is
signal QT:std_logic_vector(31 downto 0);
signal TEMP:std_logic_vector(31 downto 0);
signal n:integer:=0;
begin
process(clk)
begin
if rst='0' then Q
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP
TEMP '0');
end case;
QT<=QT+TEMP;
n<=n+1;
end if;
else Q<=QT;
end if;
end if;
end process;
end Behavioral;
但是有两个error
ERROR:HDLParsers:808 - "D:/my project/multi/multiplier1.vhd" Line 52. = can not have such operands in this context.
ERROR:HDLParsers:164 - "D:/my project/multi/multiplier1.vhd" Line 87. parse error, unexpected IDENTIFIER, expecting PIPE or ROW
怎么弄啊?大神有什么好的建议也可以说说~
第一个错误应该是signal n:integer:=0;。这个地方n应该指定位宽,比如signal n:integer range 0 to 15; 然后在复位时把n赋初值为0。
第二个错误是 解析错误。初步判断是 if (B(n)=1) then TEMP<="0000000000000000" & A;少了end if,应该把下面的end if上移此处