模60的8421BCD码加法计数器 时序仿真波形不正确 怎么修改?
时间:10-02
整理:3721RD
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module counter60(qout,cout,data,load,reset,clk);
input load,clk,reset;
input[7:0] data;
output reg[7:0] qout;output cout;
always @(posedge clk)
begin
if(reset) qout<=0;
else if(load) qout<=data;
else begin
if(qout[3:0]==9)
begin qout[3:0]<=0;
if(qout[7:4]==5) qout[7:4]<=0;
else qout[7:4]<=qout[7:4]+1;
end
else qout[3:0]<=qout[3:0]+1;
end
end
assign cout=(qout==8'd59)?1:0;
endmodule
input load,clk,reset;
input[7:0] data;
output reg[7:0] qout;output cout;
always @(posedge clk)
begin
if(reset) qout<=0;
else if(load) qout<=data;
else begin
if(qout[3:0]==9)
begin qout[3:0]<=0;
if(qout[7:4]==5) qout[7:4]<=0;
else qout[7:4]<=qout[7:4]+1;
end
else qout[3:0]<=qout[3:0]+1;
end
end
assign cout=(qout==8'd59)?1:0;
endmodule
这个60的BCD码计数器程序时序仿真不正确怎么修改