请大虾帮忙解释一下！！
/*MT6129D*/ #define QB_SR2
/*MT6129D*/ #define QB_SR2M
/*MT6129D*/ #define QB_SR3
/*MT6129D*/ #define QB_PR1
/*MT6129D*/ #define QB_PR2
/*MT6129D*/ #define QB_PR3
/*MT6129D*/ #define QB_ST1
/*MT6129D*/ #define QB_ST2
/*MT6129D*/ #define QB_ST3
/*MT6129D*/ #define QB_PT1
/*MT6129D*/ #define QB_PT2
/*MT6129D*/ #define QB_PT3
/*MT6129D*/ #define QB_APCON
/*MT6129D*/ #define QB_APCMID
/*MT6129D*/ #define QB_APCOFF
/*MT6129D*/ #define QB_APCDACON
/*MT6129D*/ /*MT6205*/ #define PDATA_GSM_PR2
/*MT6129D*/ /*MT6205*/ #define PDATA_GSM_PR3
/*MT6129D*/ /*MT6205*/ #define PDATA_GSM_PT1
/*MT6129D*/ /*MT6205*/ #define PDATA_GSM_PT2
/*MT6129D*/ /*MT6205*/ #define PDATA_GSM_PT3
/*MT6129D*/ /*MT6205*/ #define PDATA_DCS_PR1
/*MT6129D*/ /*MT6205*/ #define PDATA_DCS_PR2
/*MT6129D*/ /*MT6205*/ #define PDATA_DCS_PR3
/*MT6129D*/ /*MT6205*/ #define PDATA_DCS_PT1
/*MT6129D*/ /*MT6205*/ #define PDATA_DCS_PT2
/*MT6129D*/ /*MT6205*/ #define PDATA_DCS_PT3
/*MT6129D*/ /*MT6205*/ #define PDATA_PCS_PR1
/*MT6129D*/ /*MT6205*/ #define PDATA_PCS_PR2
/*MT6129D*/ /*MT6205*/ #define PDATA_PCS_PR3
/*MT6129D*/ /*MT6205*/ #define PDATA_PCS_PT1
/*MT6129D*/ /*MT6205*/ #define PDATA_PCS_PT2
请大虾帮忙解释一下！每个定义是干什么用的,,,,,谢谢~~~~
同问 谢谢
http://www.52rd.com/bbs/Detail_RD.BBS_74026_8_1_1.html
QB_SR1 The time point at which BS[/COLOR]I in R[/COLOR]eiceiver slot send its 1[/COLOR]st stage of commands, the unit is quarter-bit
usually this include PLL synthesizer warm up.
QB_SR2 The time point at which BS[/COLOR]I in R[/COLOR]eiceiver slot send its 2[/COLOR]nd stage of commands, the unit is quarter-bit
usually this include various receiver setup.
QB_SR2M The time point at which BS[/COLOR]I between Multi-[/COLOR] R[/COLOR]eiceiver slot send its 2[/COLOR]nd stage of commands, the unit is quarter-bit
usually this include receiver gain adjust.
QB_SR3 The time point at which BS[/COLOR]I in R[/COLOR]eiceiver slot send its 3[/COLOR]rd stage of commands, the unit is quarter-bit
usually this set receiver to idle.
/*MT6129D*/ #define QB_ST1
/*MT6129D*/ #define QB_ST2
/*MT6129D*/ #define QB_ST3
are similar as above, but is for transmit slot
/*MT6129D*/ #define QB_PR1
/*MT6129D*/ #define QB_PR2
/*MT6129D*/ #define QB_PR3
/*MT6129D*/ #define QB_PT1
/*MT6129D*/ #define QB_PT2
/*MT6129D*/ #define QB_PT3
The time point at which BP[/COLOR]I in R[/COLOR]eiceive/T[/COLOR]ransmit slot change its state to corresponding BPI settings(etc:QB_PR1->PDATA_GSM_PR1,PDATA_DCS_PR1,PDATA_PCS_PR2), the unit is quarter-bit
时序而已
/*MT6129D*/ #define QB_APCON Ramping up controlled length(Unit: 1/4 bit)
/*MT6129D*/ #define QB_APCMID (GPRS)Ramping mid controlled length(Unit: 1/4 bit)
/*MT6129D*/ #define QB_APCOFF Ramping down controlled length(Unit: 1/4 bit)
/*MT6129D*/ #define QB_APCDACON The time ramping DAC turned on its DC output(as APC DC offset)(Unit: 1/4 bit)
小弟太菜，还是一头雾水，那逻辑不对，怎么改那?