高手指点:蓝牙测试载波频率漂移DH1不过
Freq shift is related to three factors:
a. PLL locking time;
b. charge pump
c. PA lineraity;
for a ;you should consider the loop filter and some SW driver paarmeter adjusting;
for b, you should calculating your VCO tank energe and some powersuppuly capacity;
for c, you should check the PA's performance;
and you still consider the PLL circuit working normally or not, does it exist the Grounding problem and interference problem;
hope it will provide some idea for your debug.
呵呵,多谢拉!
问题已解决。将TCXO BUFFER的TCXO输入端的隔直电容由100PF改为180PF.
请教楼上的,为什么把100pf改为180pf就没问题了阿?
对于隔直来说,这两个值差别很大吗?
冒昧的问一句,原来DH1的drift rate到多少?不知是哪家的片子,貌似现在手机上BT chip用TCXO的不过了。
初步解释是:
此电容太小,会导致隔直效果不够,低频噪声较大从而影响TCXO的频稳度;电容太大(比如大于300pF),会导致BT无法建立连接(估计是因为TCXO幅度受到影响)。
另外,当电容大到一定程度(比如1000pF)时,会造成GSM900/1800/UMTS2100等的调制特性乱掉(怀疑这是负载电容的影响)。
原来DH1:-27KHZ ;drift rate:-11.95KHZ/50us
用的是京瓷的芯片
是用的系统26M TCXO? Kyocera没有自己的BT chip,他是做module的,是不是FC01UAX这个module?
tcxo时钟是19.2Mhz
大哥就你这水平还做3G,电容越小,隔直越好,电容越大,就相当于短路了(电容串联)
......
In my opinion, the reason may be as follows:
1: Too small TCXO output capacitor results less drivering capability/amplitude of clock, and causes reference more astable and SNR decrease.
2: Too large TCXO output capacitor results dramatic pulling effect and cause frequency deviation large
[QUOTE][/QUOTE]以下是引用youyongnju在2007-4-3 23:55:52的发言:
大哥就你这水平还做3G,电容越小,隔直越好,电容越大,就相当于短路了(电容串联)
......
In my opinion, the reason may be as follows:
1: Too small TCXO output capacitor results less drivering capability/amplitude of clock, and causes reference more astable and SNR decrease.
2: Too large TCXO output capacitor results dramatic pulling effect and cause frequency deviation large
你的解释这更说明了那个电容不是隔直的呀
首先声明几点:
1,我不是大哥,请注意性别。
2,本人是做基带的,对射频不是很在行,所以才发贴请教。此结果是请教做射频的人士。
3,如果那位大虾比较有经验,请不吝赐教,但不要人身攻击!
