移动电源远翔带AD单片机程序8PC71A
时间:10-02
整理:3721RD
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;==============================================================================
; FEELING TECHNOLOGY CORP.
;==============================================================================
;IC : FM8PC71A
;CPUCLK : 1 MHz
;WDT : Disable
;------------------------------------------------------------------------------
;MODIFY BY : KL Lai
;DATE : 2010-1202
;VER : 1.00
;------------------------------------------------------------------------------
#include "F5711_define.ash"
#define VOUT PORTB,0 ;PORTB[0]
#define REF PORTB,4 ;PORTB[4]
#define DIN PORTB,1 ;PORTB[1]
#define SCLK PORTB,2 ;PORTB[2]
#define CS PORTA,5 ;PORTA[5]
SDA_LOW MACRO
BCR DIN
ENDM
SDA_HIGH MACRO
BSR DIN
ENDM
SCL_HIGH MACRO
BSR SCLK
ENDM
SCL_LOW MACRO
BCR SCLK
ENDM
;=====================================================================
;-------------------------- ROM Areas --------------------------------
;=====================================================================
ORG 000H
GOTO reset
ORG 003H
GOTO int_vector
;---------------------------------------------------------------------
INT_VECTOR:
MOVAR INTACCTMP
SWAPR STATUS,A
MOVAR INTSTATMP ;Push Stack
BTRSC intflag,paif_b
GOTO paitask ;porta
BTRSC intflag,pbif_b
GOTO pbitask ;portb
BTRSC PWM0CR,P0TMIF_B
GOTO PWM0Itask ;PWM0
BTRSC PWM1CR,P1TMIF_B
GOTO PWM1Itask ;PWM1
BTRSC PWM2CR,P2TMIF_B
GOTO PWM2Itask ;PWM2
BTRSC PWM3CR,P3TMIF_B
GOTO PWM3Itask ;PWM3
BTRSC ADCON_2,ADCIF_B
GOTO ADCItask ;ADC
int_exit:
SWAPR INTSTATMP,A ;Pop Stack
MOVAR STATUS
SWAPR INTACCTMP,R
SWAPR INTACCTMP,A
RETFIE
;=====================================================================
;------------------ Main Programme Beginning -------------------------
;=====================================================================
;----------------------------------------------------------------------
;----------------------------------------------------------------------
Eight_Cycle:
goto $+1
goto $+1
RETURN
;=====================================================================
; MARCO
;=====================================================================
;-------------------------For 12MHz------------------------------------
; Variable : m=Low-byte , n=High-byte
; Time = n*256*2us + (m+1)*2us
M_12MHz_Delay_us MACRO n,m
movia m
movar DlyCnt_L
movia n
movar DlyCnt_M
CALL Dec_counter_12MHz ;6 cycles
ENDM
;--------------------------------------------------
delay_2us_12MHz:
call Eight_Cycle
call Eight_Cycle
Dec_counter_12MHz:
movia 0xFF
addar DlyCnt_L,r
btrsc status,0
incr DlyCnt_M,r
addar DlyCnt_M,r
btrsc status,0
goto delay_2us_12MHz ;8 cycles
exit_delay_12MHz: ;7 cycles
nop ;counter overflow
call Eight_Cycle
RETURN ;6 + 7 + (1+8) + 2 = 24 cycles
;---------------------------------------------------------------------
;---------------------------------------------------------------------
; Variable : n
; Delay Time ~= n*100ms
; パDelay丁耕, ぃ暗弘絋璸衡
M_12MHz_Delay_ms MACRO n
movia n
movar DlyCnt_H
movr DlyCnt_H,A
btrsc status,2
goto $+9 ;exit_delay_12MHz_ms ;If counter=0 , exit count
;Dec_counter_12MHz_ms:
clrwdt
movia 50h
movar DlyCnt_L
movia C3h
movar DlyCnt_M
CALL Dec_counter_12MHz ;100ms
decrsz DlyCnt_H,R
goto $-7 ;Dec_counter_12MHz_ms
;exit_delay_12MHz_ms:
ENDM
;=====================================================================
;----------------------------------------------------------------------
;-------------------------For 24MHz------------------------------------
; Variable : m=Low-byte , n=High-byte
; Time = n*256*2us + (m+1)*2us
M_24MHz_Delay_us MACRO n,m
movia m
movar DlyCnt_L
movia n
movar DlyCnt_M
CALL Dec_counter_24MHz ;6 cycles
ENDM
;--------------------------------------------------
delay_2us_24MHz:
call Eight_Cycle
call Eight_Cycle
call Eight_Cycle
call Eight_Cycle
call Eight_Cycle
Dec_counter_24MHz:
movia 0xFF
addar DlyCnt_L,r
btrsc status,0
incr DlyCnt_M,r
addar DlyCnt_M,r
btrsc status,0
goto delay_2us_24MHz ;8 cycles
exit_delay_24MHz: ;7 cycles
nop ;counter overflow
call Eight_Cycle
call Eight_Cycle
call Eight_Cycle
call Eight_Cycle
RETURN ;6 + 7 + (1+8*4) + 2 = 48 cycles
;---------------------------------------------------------------------
;---------------------------------------------------------------------
; Variable : n
; Delay Time ~= n*100ms
; パDelay丁耕, ぃ暗弘絋璸衡
M_24MHz_Delay_ms MACRO n
movia n
movar DlyCnt_H
movr DlyCnt_H,A
btrsc status,2
goto $+9 ;exit_delay_24MHz_ms ;If counter=0 , exit count
;Dec_counter_24MHz_ms:
clrwdt
movia 50h
movar DlyCnt_L
movia C3h
movar DlyCnt_M
CALL Dec_counter_24MHz ;100ms
decrsz DlyCnt_H,R
goto $-7 ;Dec_counter_24MHz_ms
;exit_delay_24MHz_ms:
ENDM
;=====================================================================
;=====================================================================
reset:
clrwdt
BCR WDT,WDTE_B ;Disable Watch dog timer
nop
nop
CALL CLEAR_RAM
CALL RESET_INIT
BTRSS PCON,LVDT24_B
GOTO reset
MOVIA 00000000B
IOST PAMODE0
MOVIA 11111011B
IOST PAMODE1 ;PA2 HIGH IS FIRC , LOW IS FOSC
M_12MHz_Delay_us 003D,005D
CALL ADC_TEST_INIT
MAIN_LOOP:
NOP
NOP
GOTO MAIN_LOOP
;=====================================================================
;=================== ADC Testing Start ===============================
;=====================================================================
//弧: ICE VREFH = 3V 块 AD5541REF pin竲, 糶Data 0xFFFF, 0xDFFF,
// 0xBFFF, 0x9FFF, 0x7FFF, 0x5FFF, 0x3FFF, 0x1FFF, 0x0000AD5541
// Vout pin块AIN0, 竒筁ADCRead ADCHB,ADCLBㄓ喷靡ADC琌タ盽,
// 璝琌糶Data0xFFFF玥┕玡喷靡2筳8CodeData(0xFF7F,0xFEFF),
// ぇゑ耕硂3DataADCHB,ADCLB琌筳6~10codeず, 璝琌絛瞅ず
// 玥ボADC琌OK琌絬┦, 璝琌糶Data0x0000玥┕喷靡2筳8
// CodeData(0x007F,0x00FF).
//Trigger key : PA3: 匡拒Digital input, 抖0xFFFF, 0xDFFF, 0xBFFF, 0x9FFF,
// 0x7FFF, 0x5FFF, 0x3FFF, 0x1FFF, 0x0000, 讽程0x0000ぇ
// PA3秈笆喷靡家Α, 碞琌ぃノTrigger PA4ㄓ秨﹍喷靡, 稱
// 喷靡ぃDigital input临琌Trigger PA3ㄓ暗ち传.
// PA4: 秨﹍喷靡龄.
//喷靡秈︽いの挡狦: PB3=1, PB5=0ボタ喷靡い, PB3=0, PB5=0ボ喷靡挡挡狦岿粇,
// PB3=0, PB5=1ボ喷靡挡挡狦タ絋
ADC_TEST_INIT:
MOVIA 00100000B
IOST PAMODE0
MOVIA 11111111B //PA5 as output
IOST PAMODE1
MOVIA 00101110B
IOST PBMODE0
MOVIA 11101110B //PB1,2,3,5 as output
IOST PBMODE1
MOVIA 0FFH
MOVAR PORTA
MOVIA 0FEH
MOVAR PORTB
BCR ADCON_1,CHSEL0_B //Input Channel is PB0
BCR ADCON_1,CHSEL1_B
BCR ADCON_1,CHSEL2_B
BSR ADCON_1,ADCSR0_B
BSR ADCON_1,ADCSR1_B //ADC clock is Fcpu
BSR ADCON_2,SVREFH_B //External VREFH (PB4)
//BCR ADCON_2,SVREFH_B //Internal voltage
BCR ADCON_2,ADCNT_B //Trigger mode
//BSR ADCON_2,ADCNT_B //Contiune mode
BCR ADCON_2,DACOEN_B //Disable DAC output to PB3
BSR ADCON_2,ADCTMS_B //Fixed convert timing
BCR ADCON_2,SELVER0_B
BSR ADCON_2,SELVER1_B //VREFH = 3V
MOVIA 00000000B
IOST ADCON_3 //12 bits
MOVIA 11111100B
IOST ADCON_4 //T1 = 4 cycles, T2 = 4 cycles, T3 = 4 cycles
BCR PORTB,5 //ADC OK
BCR PORTB,3 //Testing ADC
BSR ADCON_1,ADCEN_B //Enable ADC
CLRR DACHB_REG
CLRR DACLB_REG
CLRR SEL_DIGITAL_IN
INCR SEL_DIGITAL_IN,R
MOVIA 0FFH
MOVAR DACHB_REG
MOVAR DACHB_REAL
MOVIA 0FFH
MOVAR DACLB_REG //Default
MOVAR DACLB_REAL
CALL TX_DAC_DATA
TRIGGER_LOOP:
BSR PORTA,3
BSR PORTA,4
NOP
NOP
//BTRSS ADCON_2,ADCIF_B
//GOTO $-1
//BCR ADCON_2,ADCIF_B
NOP
NOP
NOP
NOP
BTRSS PORTA,3
GOTO SELECT_DIGITAL_INPUT
BTRSC ADCON_2,ADCNT_B //Contiune mode
GOTO Continue_ADC
BTRSS PORTA,4
GOTO Trigger_ADC
GOTO TRIGGER_LOOP
;-----------------------------------------------------------
SELECT_DIGITAL_INPUT:
BSR PORTB,5
BSR PORTB,3
M_12MHz_Delay_us 020D,000D
BCR PORTB,5
BCR PORTB,3
BSR PORTA,3
BTRSS PORTA,3
GOTO $-1
MOVR SEL_DIGITAL_IN,A
ADDAR PCL,R
GOTO DATA_FFFF
GOTO DATA_DFFF
GOTO DATA_BFFF
GOTO DATA_9FFF
GOTO DATA_7FFF
GOTO DATA_5FFF
GOTO DATA_3FFF
GOTO DATA_1FFF
GOTO DATA_0000
GOTO CHANGE_MODE
DATA_FFFF:
MOVIA 0FFH
MOVAR DACHB_REG
MOVAR DACHB_REAL
MOVIA 0FFH
MOVAR DACLB_REG
MOVAR DACLB_REAL
CALL TX_DAC_DATA
INCR SEL_DIGITAL_IN,R
GOTO WAIT_KEY_RELEASE
DATA_DFFF:
MOVIA 0DFH
MOVAR DACHB_REG
MOVAR DACHB_REAL
MOVIA 0FFH
MOVAR DACLB_REG
MOVAR DACLB_REAL
CALL TX_DAC_DATA
INCR SEL_DIGITAL_IN,R
GOTO WAIT_KEY_RELEASE
DATA_BFFF:
MOVIA 0BFH
MOVAR DACHB_REG
MOVAR DACHB_REAL
MOVIA 
; FEELING TECHNOLOGY CORP.
;==============================================================================
;IC : FM8PC71A
;CPUCLK : 1 MHz
;WDT : Disable
;------------------------------------------------------------------------------
;MODIFY BY : KL Lai
;DATE : 2010-1202
;VER : 1.00
;------------------------------------------------------------------------------
#include "F5711_define.ash"
#define VOUT PORTB,0 ;PORTB[0]
#define REF PORTB,4 ;PORTB[4]
#define DIN PORTB,1 ;PORTB[1]
#define SCLK PORTB,2 ;PORTB[2]
#define CS PORTA,5 ;PORTA[5]
SDA_LOW MACRO
BCR DIN
ENDM
SDA_HIGH MACRO
BSR DIN
ENDM
SCL_HIGH MACRO
BSR SCLK
ENDM
SCL_LOW MACRO
BCR SCLK
ENDM
;=====================================================================
;-------------------------- ROM Areas --------------------------------
;=====================================================================
ORG 000H
GOTO reset
ORG 003H
GOTO int_vector
;---------------------------------------------------------------------
INT_VECTOR:
MOVAR INTACCTMP
SWAPR STATUS,A
MOVAR INTSTATMP ;Push Stack
BTRSC intflag,paif_b
GOTO paitask ;porta
BTRSC intflag,pbif_b
GOTO pbitask ;portb
BTRSC PWM0CR,P0TMIF_B
GOTO PWM0Itask ;PWM0
BTRSC PWM1CR,P1TMIF_B
GOTO PWM1Itask ;PWM1
BTRSC PWM2CR,P2TMIF_B
GOTO PWM2Itask ;PWM2
BTRSC PWM3CR,P3TMIF_B
GOTO PWM3Itask ;PWM3
BTRSC ADCON_2,ADCIF_B
GOTO ADCItask ;ADC
int_exit:
SWAPR INTSTATMP,A ;Pop Stack
MOVAR STATUS
SWAPR INTACCTMP,R
SWAPR INTACCTMP,A
RETFIE
;=====================================================================
;------------------ Main Programme Beginning -------------------------
;=====================================================================
;----------------------------------------------------------------------
;----------------------------------------------------------------------
Eight_Cycle:
goto $+1
goto $+1
RETURN
;=====================================================================
; MARCO
;=====================================================================
;-------------------------For 12MHz------------------------------------
; Variable : m=Low-byte , n=High-byte
; Time = n*256*2us + (m+1)*2us
M_12MHz_Delay_us MACRO n,m
movia m
movar DlyCnt_L
movia n
movar DlyCnt_M
CALL Dec_counter_12MHz ;6 cycles
ENDM
;--------------------------------------------------
delay_2us_12MHz:
call Eight_Cycle
call Eight_Cycle
Dec_counter_12MHz:
movia 0xFF
addar DlyCnt_L,r
btrsc status,0
incr DlyCnt_M,r
addar DlyCnt_M,r
btrsc status,0
goto delay_2us_12MHz ;8 cycles
exit_delay_12MHz: ;7 cycles
nop ;counter overflow
call Eight_Cycle
RETURN ;6 + 7 + (1+8) + 2 = 24 cycles
;---------------------------------------------------------------------
;---------------------------------------------------------------------
; Variable : n
; Delay Time ~= n*100ms
; パDelay丁耕, ぃ暗弘絋璸衡
M_12MHz_Delay_ms MACRO n
movia n
movar DlyCnt_H
movr DlyCnt_H,A
btrsc status,2
goto $+9 ;exit_delay_12MHz_ms ;If counter=0 , exit count
;Dec_counter_12MHz_ms:
clrwdt
movia 50h
movar DlyCnt_L
movia C3h
movar DlyCnt_M
CALL Dec_counter_12MHz ;100ms
decrsz DlyCnt_H,R
goto $-7 ;Dec_counter_12MHz_ms
;exit_delay_12MHz_ms:
ENDM
;=====================================================================
;----------------------------------------------------------------------
;-------------------------For 24MHz------------------------------------
; Variable : m=Low-byte , n=High-byte
; Time = n*256*2us + (m+1)*2us
M_24MHz_Delay_us MACRO n,m
movia m
movar DlyCnt_L
movia n
movar DlyCnt_M
CALL Dec_counter_24MHz ;6 cycles
ENDM
;--------------------------------------------------
delay_2us_24MHz:
call Eight_Cycle
call Eight_Cycle
call Eight_Cycle
call Eight_Cycle
call Eight_Cycle
Dec_counter_24MHz:
movia 0xFF
addar DlyCnt_L,r
btrsc status,0
incr DlyCnt_M,r
addar DlyCnt_M,r
btrsc status,0
goto delay_2us_24MHz ;8 cycles
exit_delay_24MHz: ;7 cycles
nop ;counter overflow
call Eight_Cycle
call Eight_Cycle
call Eight_Cycle
call Eight_Cycle
RETURN ;6 + 7 + (1+8*4) + 2 = 48 cycles
;---------------------------------------------------------------------
;---------------------------------------------------------------------
; Variable : n
; Delay Time ~= n*100ms
; パDelay丁耕, ぃ暗弘絋璸衡
M_24MHz_Delay_ms MACRO n
movia n
movar DlyCnt_H
movr DlyCnt_H,A
btrsc status,2
goto $+9 ;exit_delay_24MHz_ms ;If counter=0 , exit count
;Dec_counter_24MHz_ms:
clrwdt
movia 50h
movar DlyCnt_L
movia C3h
movar DlyCnt_M
CALL Dec_counter_24MHz ;100ms
decrsz DlyCnt_H,R
goto $-7 ;Dec_counter_24MHz_ms
;exit_delay_24MHz_ms:
ENDM
;=====================================================================
;=====================================================================
reset:
clrwdt
BCR WDT,WDTE_B ;Disable Watch dog timer
nop
nop
CALL CLEAR_RAM
CALL RESET_INIT
BTRSS PCON,LVDT24_B
GOTO reset
MOVIA 00000000B
IOST PAMODE0
MOVIA 11111011B
IOST PAMODE1 ;PA2 HIGH IS FIRC , LOW IS FOSC
M_12MHz_Delay_us 003D,005D
CALL ADC_TEST_INIT
MAIN_LOOP:
NOP
NOP
GOTO MAIN_LOOP
;=====================================================================
;=================== ADC Testing Start ===============================
;=====================================================================
//弧: ICE VREFH = 3V 块 AD5541REF pin竲, 糶Data 0xFFFF, 0xDFFF,
// 0xBFFF, 0x9FFF, 0x7FFF, 0x5FFF, 0x3FFF, 0x1FFF, 0x0000AD5541
// Vout pin块AIN0, 竒筁ADCRead ADCHB,ADCLBㄓ喷靡ADC琌タ盽,
// 璝琌糶Data0xFFFF玥┕玡喷靡2筳8CodeData(0xFF7F,0xFEFF),
// ぇゑ耕硂3DataADCHB,ADCLB琌筳6~10codeず, 璝琌絛瞅ず
// 玥ボADC琌OK琌絬┦, 璝琌糶Data0x0000玥┕喷靡2筳8
// CodeData(0x007F,0x00FF).
//Trigger key : PA3: 匡拒Digital input, 抖0xFFFF, 0xDFFF, 0xBFFF, 0x9FFF,
// 0x7FFF, 0x5FFF, 0x3FFF, 0x1FFF, 0x0000, 讽程0x0000ぇ
// PA3秈笆喷靡家Α, 碞琌ぃノTrigger PA4ㄓ秨﹍喷靡, 稱
// 喷靡ぃDigital input临琌Trigger PA3ㄓ暗ち传.
// PA4: 秨﹍喷靡龄.
//喷靡秈︽いの挡狦: PB3=1, PB5=0ボタ喷靡い, PB3=0, PB5=0ボ喷靡挡挡狦岿粇,
// PB3=0, PB5=1ボ喷靡挡挡狦タ絋
ADC_TEST_INIT:
MOVIA 00100000B
IOST PAMODE0
MOVIA 11111111B //PA5 as output
IOST PAMODE1
MOVIA 00101110B
IOST PBMODE0
MOVIA 11101110B //PB1,2,3,5 as output
IOST PBMODE1
MOVIA 0FFH
MOVAR PORTA
MOVIA 0FEH
MOVAR PORTB
BCR ADCON_1,CHSEL0_B //Input Channel is PB0
BCR ADCON_1,CHSEL1_B
BCR ADCON_1,CHSEL2_B
BSR ADCON_1,ADCSR0_B
BSR ADCON_1,ADCSR1_B //ADC clock is Fcpu
BSR ADCON_2,SVREFH_B //External VREFH (PB4)
//BCR ADCON_2,SVREFH_B //Internal voltage
BCR ADCON_2,ADCNT_B //Trigger mode
//BSR ADCON_2,ADCNT_B //Contiune mode
BCR ADCON_2,DACOEN_B //Disable DAC output to PB3
BSR ADCON_2,ADCTMS_B //Fixed convert timing
BCR ADCON_2,SELVER0_B
BSR ADCON_2,SELVER1_B //VREFH = 3V
MOVIA 00000000B
IOST ADCON_3 //12 bits
MOVIA 11111100B
IOST ADCON_4 //T1 = 4 cycles, T2 = 4 cycles, T3 = 4 cycles
BCR PORTB,5 //ADC OK
BCR PORTB,3 //Testing ADC
BSR ADCON_1,ADCEN_B //Enable ADC
CLRR DACHB_REG
CLRR DACLB_REG
CLRR SEL_DIGITAL_IN
INCR SEL_DIGITAL_IN,R
MOVIA 0FFH
MOVAR DACHB_REG
MOVAR DACHB_REAL
MOVIA 0FFH
MOVAR DACLB_REG //Default
MOVAR DACLB_REAL
CALL TX_DAC_DATA
TRIGGER_LOOP:
BSR PORTA,3
BSR PORTA,4
NOP
NOP
//BTRSS ADCON_2,ADCIF_B
//GOTO $-1
//BCR ADCON_2,ADCIF_B
NOP
NOP
NOP
NOP
BTRSS PORTA,3
GOTO SELECT_DIGITAL_INPUT
BTRSC ADCON_2,ADCNT_B //Contiune mode
GOTO Continue_ADC
BTRSS PORTA,4
GOTO Trigger_ADC
GOTO TRIGGER_LOOP
;-----------------------------------------------------------
SELECT_DIGITAL_INPUT:
BSR PORTB,5
BSR PORTB,3
M_12MHz_Delay_us 020D,000D
BCR PORTB,5
BCR PORTB,3
BSR PORTA,3
BTRSS PORTA,3
GOTO $-1
MOVR SEL_DIGITAL_IN,A
ADDAR PCL,R
GOTO DATA_FFFF
GOTO DATA_DFFF
GOTO DATA_BFFF
GOTO DATA_9FFF
GOTO DATA_7FFF
GOTO DATA_5FFF
GOTO DATA_3FFF
GOTO DATA_1FFF
GOTO DATA_0000
GOTO CHANGE_MODE
DATA_FFFF:
MOVIA 0FFH
MOVAR DACHB_REG
MOVAR DACHB_REAL
MOVIA 0FFH
MOVAR DACLB_REG
MOVAR DACLB_REAL
CALL TX_DAC_DATA
INCR SEL_DIGITAL_IN,R
GOTO WAIT_KEY_RELEASE
DATA_DFFF:
MOVIA 0DFH
MOVAR DACHB_REG
MOVAR DACHB_REAL
MOVIA 0FFH
MOVAR DACLB_REG
MOVAR DACLB_REAL
CALL TX_DAC_DATA
INCR SEL_DIGITAL_IN,R
GOTO WAIT_KEY_RELEASE
DATA_BFFF:
MOVIA 0BFH
MOVAR DACHB_REG
MOVAR DACHB_REAL
MOVIA